The ideal semiconductor memory for future silicon integrated circuits unifies the qualities of the different memory technologies of today. It should have the high speed of static random access memory (SRAM), the non-volatility of flash, and the density of dynamic random access memory (DRAM). In addition, it should be low in cost and scalable to nanometer dimensions. Flash memories are currently used as non-volatile memory in stand-alone and embedded chips with great commercial success. However, flash does not qualify as an ideal memory, owing to its relatively long programming time (>10 µs) and limited cycle endurance. Furthermore, the high programming voltages (>10 V) complicate scaling down to nanometer cell sizes.
 
Today’s dominant solid-state memory technologies – SRAM, DRAM, and flash – have been around for a long time, with Flash the youngest, at 23 years. Their longevity can be explained in part by mutually beneficial differentiation. Each technology does a single thing very well, but many systems need all three memory types to deliver overall good performance at reasonable cost. However, the gain from differentiation comes at the cost of increased system and fabrication complexity, particularly in so-called embedded applications, where an entire electronic system is implemented on a single chip, with SRAM, DRAM and flash often used side by side.
 
All three technologies have advantages and disadvantages. SRAM has excellent read and write speeds, integrates readily into the process technology of embedded applications, and requires little power for data retention. However, its large cell size (a typical memory bit requires six transistors) makes it impractical for embedded applications that require a lot of memory.  Embedded SRAM is used for cache memory in microprocessors, where high speed is more important than large amounts of memory.
 
DRAM uses a single transistor and a storage capacitor per cell, and thus it provides a denser architecture than SRAM, at the expense of increased embedded process complexity. Because the stored charge tends to leak out of the capacitor, DRAM requires constant power to refresh its bit state every few milliseconds. Because of its high power consumption, large amounts of DRAM are impractical for portable electronics with limited battery life.
 
In contrast to static and dynamic RAM, flash memory offers nonvolatile data storage; that is, its information is not lost when the power is turned off. Non-volatility is highly desirable in portable electronics, because nonvolatile data retention does not consume any battery power. Flash also has high density and moderately fast read access time, but its write mode is too slow and its write endurance far too limited for many applications. In addition, embedded flash needs its own high-voltage drivers, complicating the design and manufacturing process.
 
For some time, researchers have tried to devise non-volatile alternatives to flash. The goal is a "universal memory" that combines the best attributes of SRAM, DRAM, and flash. Such a memory would eliminate the need for multiple memories in many applications, would improve system performance and reliability by avoiding data transfer between multiple memories, and would reduce overall system cost
 

STUDY GOAL AND OBJECTIVES
 
The main reason for growing commitments to emerging non-volatile random access memory (NVRAM) is that scaling has now become a serious issue for the memory industry. Leakage is a major hurdle at 65nm and beyond. Three-dimensional structures offer one solution, but there is a limit on how far one can go in this technology. Similarly, SRAM makers have largely abandoned large 6T cells in portable devices in favor of 1T pseudo-SRAM (PSRAM). But again, this is only a holding action until something better comes along. Flash has a serious architectural scaling problem that seems likely to become critical well below 90nm. Such problems are making both semiconductor firms and OEMs take emerging memories much more seriously. Not only are many of these new technologies inherently more scalable, but also they seem well suited to the next generation of mobile computing and communications that will demand high capacity memories capable of storing and rapidly accessing video and large databases without overburdening battery power sources. In light of such issues, emerging memory solutions seem to be a key technology.
 
Ferroelectric RAM (FERAM or F-RAM), magnetic RAM (MRAM), and other next-generation technologies are all attempts to develop the "perfect" memory – one that is non-volatile and whose bits can be fully altered, with ultra-fast read and write rates and an infinite number of rewrite cycles. None of them succeeds in all areas, but all of them make key advancements in at least some of these important memory characteristics.
 
This study has identified and focused on seven emerging non-volatile memory technologies such as FERAM, phase change random access memory (PCM, PC-RAM, PRAM, OUM), magneto-resistive RAM (MRAM, STT RAM, Race Track Memory), resistance switching RAM (RRAM, ReRAM, CB-RAM, PMC-RAM, Nanobridge RAM CMOx, memistors), zero capacitor (ZRAM), quantum dot RAM and polymer printed memory.
 
This study focuses on emerging non-volatile random access memory products, providing market data about the size and growth of the application segments and new developments, including a detailed patent analysis, company profiles and industry trends. Another goal of this report is to provide a detailed and comprehensive multi-client study of the market in North America, Europe, Japan, China, India, Korea and the rest of the world (ROW) for potential future emerging non-volatile random access memory products and business opportunities.
 
The objectives include thorough coverage of the underlying economic issues driving the current solid-state memory business, as well as assessments of new, advanced emerging non-volatile random access memory products that companies are developing. Another important objective is to provide realistic market data and forecasts for emerging memory products. This study provides the most thorough and up-to-date assessment that can be found anywhere on the subject. It also provides extensive quantification of the many important facets of market developments in emerging non-volatile random access memory products in the world.  This, in turn, contributes to the determination of what kinds of strategic responses companies might adopt in order to compete in this dynamic market.

REASONS FOR DOING THE STUDY
 
Memory design has seen a number of trends over the years.  Process technology has steadily reduced its minimum feature size.  A wide variety of techniques has been developed to improve packing-density.  A myriad of technology/circuit/system optimizations have been created to improve performance and reduce power dissipation. In addition, emerging technologies such as three-dimensional (3D) chip stacking and new physical memory mechanisms are pushing the memory.
 
Recent market trends have indicated that commercialized or near-commercialized circuits are optimized across speed, density, power efficiency and manufacturability. Flash memory is not suited to all applications, having its own problems with random access time, bit alterability, and write cycling. With the increasing need to lower power consumption with zero-power standby systems, observers are predicting that the time has come for alternative technologies to capture at least some share in specific markets such as automotive smart airbags, high-end mobile phones, and RFID tags. An embedded non-volatile memory with superior performance to flash could see widespread adoption in system-on-chip (SoC) applications such as smart cards and microcontrollers.
 
These new emerging non-volatile random access memory products address the urgent need in some specific and small-form devices.  Therefore, iRAP felt a need to do a detailed technology update and market analysis in this industry.
 
This study is intended to benefit existing and future manufacturers of solid-state memories who seek to expand revenues and market opportunities by moving into new technologies such as emerging non-volatile random access memory products which are positioned to become a preferred solution for many applications, such as automotive (e.g., smart airbags), industrial automation, transportation, harsh operating environments and extreme temperature range, instrumentation, medical equipment, industrial microcontrollers,  radio frequency identification (RFID), electronic metering and radiation-hardened  applications in consumer, military and aerospace markets.
 
The study also provides the most complete account currently available in a multi-client format of emerging non-volatile random access memory products growth in North America, Europe, Japan, China, and the rest of the world.  This report provides the most thorough and up-to-date assessment that can be found anywhere on the subject. The study also provides an extensive quantification of the many important facets of market developments in emerging markets for new generation non-volatile random access memory products, especially in countries such as China
 
SCOPE AND FORMAT
 
The market data contained in this report quantify opportunities for emerging non-volatile random access memory products. In addition to product types, the report also covers many issues concerning the merits and future prospects of the emerging non-volatile random access memory products business, including corporate strategies, information technologies and the means for providing these highly advanced products and service offerings. It also covers in detail the economic and technological issues regarded by many as critical to the industry’s current state of change. The report provides a review of the emerging non-volatile random access memory products industry and its structure, as well as the many companies involved in providing these products. The competitive positions of the main market players and the strategic options they face are also discussed, along with such competitive factors as marketing, distribution and operations.
 
TO WHOM THE STUDY CATERS
 
The study will benefit existing manufacturers of solid-state memory who seek to expand revenues and market opportunities by growing into the new technology of emerging non-volatile random access memory products, which are now positioned to become a preferred solution for many types of RFID tags, smart cards, high-end mobile phones, smart automotive airbags, etc.
 
Audiences for this study include marketing executives, business unit managers and other decision makers in solid-state memory companies themselves, as well as in companies peripheral to this business.
 
REPORT SUMMARY
 
Solid-state memories read and write data with great speed, enabling swift processing. High-performance versions, such as static and dynamic random access memory (SRAM and DRAM, respectively), use the electronic state of transistors and capacitors to store data bits. These chips lose their data, however, when the computer powers down – or crashes. Currently, solid-state memories constitute a market of over $50 billion, while the non-volatile segment is much smaller.
 
A few computers use non-volatile chips, which retain data when the power is off, as a solid-state drive in place of a hard disc drive (HDD). The now ubiquitous smart cell phones and other handheld devices also use non-volatile memory, but there is a trade-off between cost and performance. The cheapest non-volatile memory is flash memory, which, among other uses, is the basis of the little flash drives that people have hanging from their key rings. Flash memory, however, is slow and unreliable in comparison with other memory chips. Each time the high-voltage pulse (the “flash” of the name) writes a memory cell, the cell is damaged; it becomes unusable after only perhaps 10,000 writing operations. Nevertheless, because of its low cost, flash memory has become a dominant memory technology, particularly for applications in which the data will not be changed very often.
 
Industry estimates showed the DRAM market to be as much as $40 billion in 2010. However, the computing world is crying out for a memory chip with high data density that is also cheap, fast, reliable and non-volatile. With such a memory, computing devices would become much simpler and smaller, more reliable, faster and less energy consuming. Research groups around the world are investigating several approaches to meet this demand, including systems based on emerging non-volatile random access memory products.
 
Besides computers, today’s portable electronics have become computationally intensive devices as the user interface has migrated to a fully multimedia experience. To provide the performance required for these applications, the portable electronics designer uses multiple types of memories: a medium-speed random access memory for continuously changing data, a high-speed memory for caching instructions to the CPU, and a slower, non-volatile memory for long-term information storage when the power is removed. Combining all of these memory types into a single memory has been a long-standing goal of the semiconductor industry.
 
It is highly likely that different alternatives are needed for different application segments of the markets, and a good match has to be found between solid-state memory product requirements and technology capabilities.
 
Seven emerging non-volatile memory technologies such as ferromagnetic RAM (FeRAM or F-RAM),  phase change random access memory (PCM, PC-RAM, PRAM, OUM), magneto-resistive RAM (MRAM, STT RAM, race track memory), resistance switching RAM (RRAM, ReRAM, CB-RAM, PMC-RAM, nano-bridge RAM CMOx, memistors), zero capacitor (ZRAM), quantum dot RAM and polymer printed memory are poised as possible candidate to become the successor of flash memory.  This is thanks to the improved performance in direct write, bit granularity, better endurance, read access time and write throughput.
 
Major findings of this report are:

• The 2010 global market for emerging non-volatile random access memory products was projected to have reached $115 million. This market will increase to $1,590 million by 2015 showing an average annual growth rate of 69% per year from 2010 to 2015. 
• Of the six major regions surveyed for the period, North America captured about 42% of the market in 2010, followed by Europe at 36%, and the rest of the world (ROW) with 22%, dominated by Japan, Korea and China. 
• The market for emerging non-volatile random access memory used as an embedded system on chip SOC cards in 2010 will be highest with more 50% of the market. This will be followed by distant market share for RFID tags used in goods which are transported by high-speed detection conveyors, smart airbags used in automobiles, radiation-hardened memory in aerospace and nuclear installations, printed memory  platforms (such as smart cards, games, sensors, display, storage-class memory network) and high end smart mobile phones. 
• Commercial uses of these new breeds of NV-RAM have been very slow to appear because of the rapid reduction of per-bit costs of conventional flash memory technologies already in the market. However, these new technologies are sure to capture some specific markets for lower power or zero stand-by system implementation as “green” technology grows.
• Among the seven emerging non-volatile random access memory  technologies covered in this report, in 2010 the potential market for zero capacitor (ZRAM)  is      highest. The polymer printed memory market in 2010 will be next highest, followed by ferromagnetic RAM as a distant third.
• In 2015, phase change memory (PCM, PC-RAM, PRAM, OUM) will have the highest market share. FeRAM will be next highest, followed by zero capacitor RAM (ZRAM).
• MRAM promises a high capacity, next-generation memory that can replace SRAM/flash combos and battery-backed up RAM as well as supplying improved non-volatile memory solutions for high-end mobile products. MRAM is already in the sampling stage

TABLE OF CONTENTS

1. INTRODUCTION

INTRODUCTION. I

STUDY GOAL AND OBJECTIVESII

REASONS FOR DOING THE STUDY. III

CONTRIBUTIONS OF THE STUDY IV

SCOPE AND FORMAT IV

METHODOLOGY V

INFORMATION SOURCES.VI

TO WHOM THE STUDY CATERSVI

AUTHOR’S CREDENTIALSVII

2. EXECUTIVE SUMMARY

EXECUTIVE SUMMARYVIII

SUMMARY TABLE GLOBAL MARKET FOR EMERGING NON-VOLATILE

RANDOM ACCESS MEMORY PRODUCTS BY REGION THROUGH 2015.IX

SUMMARY FIGURE GLOBAL MARKET FOR EMERGING NON-VOLATILE

RANDOM ACCESS MEMORY PRODUCTS BY REGION, 2010 AND 2015 . X

3. INDUSTRY OVERVIEW

INDUSTRY OVERVIEW.1

LEADING MANUFACTURERS1

LEADING MANUFACTURERS (CONTINUED) 2

FIGURE 1 EMERGING NON-VOLATILE RANDOM ACCESS MEORY

TECHNOLOGY SCENARIO IN 2010.3

4. TECHNOLOGY OVERVIEW

TECHNOLOGY OVERVIEW4

CURRENT NON-VOLATILE MEMORIES 4

EMERGING NVM.5

EMERGING NVM (CONTINUED) 6

TYPES OF TECHNOLOGIES .7

TABLE 1 COMPARISON OF EMERGING NON-VOLATILE RANDOM ACCESS

MEMORIES.8

TABLE 2 DEFINITIONS AND EXPLANATION OF TERMINOLOGIES

APPLICABLE TO EMERGING NON-VOLATILE MEMORIES9

TABLE 2 (CONTINUED) .10

TABLE 2 (CONTINUED) .11

TABLE 2 (CONTINUED) .12

TABLE 2 (CONTINUED) .13

TABLE 2 (CONTINUED) .14

EVOLUTION OF EMERGING NON-VOLATILE RANDOM ACCESS

MEMORY TECHNOLOGIES15

BACKGROUND OF SEMICONDUCTOR MEMORY.15

MEMORY USAGE AND APPLICATIONS 16

MEMORY MARKET SEGMENTS .16

NON-VOLATILE SEMICONDUCTOR MEMORY

(NVSM)/STORAGE-CLASS MEMORY (SCM) VERSUS

EMERGING NON-VOLATILE MEMORIES 17

EMERGING NON-VOLATILE MEMORY TECHNOLOGIES.18

EMERGING NON-VOLATILE MEMORY TECHNOLOGIES

(CONTINUED) .19

ADVANTAGES OF EMERGING NVMS OVER CONVENTIONAL

NVMS.20

FIGURE 2 FLOATING-GATE POLYSILICON (FLASH) ARCHITECTURE.21

DESCRIPTION OF EMERGING NON-VOLATILE RANDOM ACCESS

MEMORIES 22

FERROMAGNETIC RANDOM ACCESS MEMORY (FERAM) .22

FIGURE 3 FERROELECTRIC CRYSTALS SHOWING MOBILE ATOM

MOVING IN DIRECTION OF APPLIED FIELD SETTING A DIGITAL

STATE-0 23

PHASE CHANGE RANDOM ACCESS MEMORY (PCRAM) 24

FIGURE 4 A VIEW OF PHASE CHANGE MEMORY.25

FIGURE 5 OPERATION OF PCRAM26

FIGURE 6 SET AND RESET OPERATION IN PCM27

CHARACTERISTICS .28

BENEFITS 28

MAGNETO-RESISTIVE RANDOM ACCESS MEMORY (MRAM) .29

DENSITY.30

POWER CONSUMPTION31

SPEED.32

OVERALL32

FIGURE 7 OPERATION OF MAGNETO-RESISTIVE RANDOM ACCESS

MEMORY.33

RACETRACK MEMORY: A VARIANT OF MRAM34

FIGURE 8 OPERATION OF RACETRACK RANDOM ACCESS MEMORY .35

COMPARISON TO OTHER MEMORY DEVICES 36

DEVELOPMENT DIFFICULTIES37

RESISTIVE SWITCHING RANDOM ACCESS MEMORY (RRAM) .38

FIGURE 9 CONSTUCTION OF RESISTIVE RANDOM ACCESS MEMORY .38

RESISTIVE SWITCHING RANDOM ACCESS MEMORY

(RRAM)39

A VARIANT OF RRAM: PROGRAMMABLE

METALLIZATION CELL (PMC) 40

CBRAM VERSUS RRAM41

COMPARISONS .41

CURRENT STATUS.42

CMOX: A VARIANT OF RRAM.42

CONDUCTIVE METAL OXIDES43

NANO-RAM: A VARIANT OF RRAM44

FIGURE 10 ARCHITECTURE OF NANO RANDOM ACCESS MEMORY .45

ADVANTAGES OF NRAM .46

COMPARISON WITH OTHER PROPOSED

SYSTEMS 47

MEMRISTORS: A VARIANT OF RRAM 48

ZERO CAPACITOR RANDOM ACCESS MEMORY.48

QUANTUM DOT RANDOM ACCESS MEMORY.49

POLYMER PRINTED MEMORY .50

FIGURE 11 A VIEW OF FERROELECTRIC POLYMER MEMORY51

POLYMER PRINTED MEMORY (CONTINUED) .52

POLYMER PRINTED MEMORY (CONTINUED) .53

5. APPLICATIONS OF EMERGING NON-VOLATILE MEMORY PRODUCTS

APPLICATIONS OF EMERGING NON-VOLATILE MEMORY PRODUCTS .54

STORAGE-CLASS MEMORY54

COMPUTE-CENTRIC WORKLOADS .54

DATA-CENTRIC WORKLOADS55

TABLE 3 STORAGE-CLASS MEMORY V/S DISK MEMORY REQUIREMENT

FORECAST IN 2020 56

SMART AIRBAGS 57

RADIATION-HARDENED MEMORY APPLICATIONS.58

RADIO-FREQUENCY IDENTIFICATION (RFID) 58

SMART MOBILE PHONES.59

PRINTED MEMORY PLATFORMS59

EMBEDDED MEMORY.60

EMBEDDED MEMORY (CONTINUED) .61

FIGURE 12 EMERGING MEMORY MANUFACTURING TECHNOLOGY AND

CONVENTIONAL CMOS TECHNOLOGY62

ORGANIC SWITCHING MATERIALS63

6. INDUSTRY STRUCTURE AND MARKETS

INDUSTRY STRUCTURE AND MARKETS 64

TABLE 4 NON-VOLATILE EMERGING MEMORIES MANUFACTURERS,

MATERIAL SUPPLIERS, END USERS AND SYSTEM INTEGRATORS 65

PARTNERSHIPS AND CONSOLIDATIONS.66

TABLE 5 ACQUISITIONS, MERGERS AND PARTNERSHIPS IN EMERGING

NON-VOLATILE MEMORIES .67

PRICE STRUCTURE68

TABLE 6 COMMERCIALLY AVAILABLE NON-VOLATILE EMERGING

MEMORY CHIPS IN 2010 68

7. GLOBAL MARKET AND REGIONAL SHARES

GLOBAL MARKET AND REGIONAL SHARES.69

MARKET ACCORDING TO APPLICATIONS .69

TABLE 7 GLOBAL MARKET FOR EMERGING NVRAM PRODUCTS BY

APPLICATION THROUGH 2015 .70

FIGURE 13 GLOBAL MARKET FOR EMERGING NVRAM PRODUCTS BY

APPLICATION THROUGH 2015 .71

MARKET BY TECHNOLOGY.72

TABLE 8 GLOBAL MARKET FOR EMERGING NVRAM PRODUCTS BY

TECHNOLOGIES ADOPTED THROUGH 2015.72

FIGURE 14 GLOBAL MARKET FOR EMERGING NVRAM PRODUCTS BY

TECHNOLOGIES ADOPTED IN 2010 73

REGIONAL MARKETS74

TABLE 9 GLOBAL MARKET FOR EMERGING NVRAM PRODUCTS BY

REGION THROUGH 201574

FIGURE 15 GLOBAL MARKET FOR EMERGING NVRAM PRODUCTS BY

REGION THROUGH 201575

8. PATENTS AND PATENT ANALYSIS

PATENTS AND PATENT ANALYSIS 76

LIST OF PATENTS 76

PHASE CHANGE RANDOM ACCESS MEMORY DEVICES AND

METHODS OF OPERATING THE SAME76

METHODS FOR FABRICATING PHASE CHANGEABLE MEMORY

DEVICES .76

PHASE CHANGE DEVICE HAVING TWO OR MORE

SUBSTANTIAL AMORPHOUS REGIONS IN HIGH

RESISTANCE STATE 76

NON-VOLATILE MEMORY INCLUDING SUB-CELL ARRAY AND

METHOD OF WRITING DATA THERETO76

MEMORY CELL DEVICE AND PROGRAMMING METHODS77

PHASE CHANGE RANDOM ACCESS MEMORY DEVICE AND

RELATED METHODS OF OPERATION77

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE.77

MULTI-LEVEL CELL RESISTANCE RANDOM ACCESS MEMORY

WITH METAL OXIDES77

MEMORY CELL WITH MEMORY MATERIAL INSULATION AND

MANUFACTURING METHOD .77

MULTI-LEVEL MEMORY CELL HAVING PHASE CHANGE

ELEMENT AND ASYMMETRICAL THERMAL BOUNDARY.77

MULTILAYER STORAGE CLASS MEMORY USING EXTERNALLY

HEATED PHASE CHANGE MATERIAL .77

MAGNETIC RAM78

PHASE CHANGE MEMORY CELL AND MANUFACTURING

METHOD .78

VACUUM-JACKETED ELECTRODE FOR PHASE CHANGE

MEMORY ELEMENT.78

METHOD FOR MAKING A KEYHOLE OPENING DURING THE

MANUFACTURE OF A MEMORY CELL.78

PHASE CHANGE RANDOM ACCESS MEMORY DEVICE78

METHOD FOR READING NON-VOLATILE FERROELECTRIC

CAPACITOR MEMORY CELL.78

RESISTANCE MEMORY ELEMENT AND NONVOLATILE

SEMICONDUCTOR MEMORY .78

RESISTANCE MEMORY ELEMENT AND NONVOLATILE

SEMICONDUCTOR MEMORY .79

METHOD TO IMPROVE FERROELECTRONIC MEMORY

PERFORMANCE AND RELIABILITY .79

MULTI-PORT PHASE CHANGE RANDOM ACCESS MEMORY

CELL AND MULTI-PORT PHASE CHANGE RANDOM ACCESS

MEMORY DEVICE INCLUDING THE SAME.79

MEMORY CELL HAVING A SIDE ELECTRODE CONTACT79

MAGNETIC MEMORIES UTILIZING A MAGNETIC ELEMENT

HAVING AN ENGINEERED FREE LAYER79

PROGRAMMABLE LOGIC DEVICE STRUCTURE USING THIRD

DIMENSIONAL MEMORY79

2T/2C FERROELECTRIC RANDOM ACCESS MEMORY WITH

COMPLEMENTARY BIT-LINE LOADS.80

NON-VOLATILE FERROELECTRIC MEMORY80

FIELD PROGRAMMABLE GATE ARRAYS USING RESISTIVITY

SENSITIVE MEMORIES .80

BUFFERING SYSTEMS FOR ACCESSING MULTIPLE LAYERS OF

MEMORY IN INTEGRATED CIRCUITS80

PHASE CHANGE MEMORY CELL HAVING INTERFACE

STRUCTURES WITH ESSENTIALLY EQUAL THERMAL

IMPEDANCES AND MANUFACTURING METHODS.80

THIN-FILM FUSE PHASE CHANGE CELL WITH THERMAL

ISOLATION PAD AND MANUFACTURING METHOD.80

METHOD OF WRITING INTO SEMICONDUCTOR MEMORY

DEVICE81

PHASE CHANGE MEMORY CELL IN VIA ARRAY WITH SELFALIGNED,

SELF-CONVERGED BOTTOM ELECTRODE AND

METHOD FOR MANUFACTURING 81

THERMALLY INSULATED PHASE CHANGE MEMORY

MANUFACTURING METHOD .81

PHASE CHANGE RANDOM ACCESS MEMORY (PRAM) DEVICE .81

PHASE CHANGE MEMORY DYNAMIC RESISTANCE TEST AND

MANUFACTURING METHODS.81

METHOD FOR MAKING A SELF-CONVERGED VOID AND

BOTTOM ELECTRODE FOR MEMORY CELL.81

I-SHAPED PHASE CHANGE MEMORY CELL .82

MULTI-RESISTIVE STATE MEMORY DEVICE WITH

CONDUCTIVE OXIDE ELECTRODES 82

PLANAR THIRD DIMENSIONAL MEMORY WITH MULTI-PORT

ACCESS .82

PHASE CHANGE RANDOM ACCESS MEMORY DEVICE82

MAGNETORESISTIVE RANDOM ACCESS MEMORY AND ITS

WRITE CONTROL METHOD82

METHODS AND SYSTEMS FOR ACCESSING MEMORY.82

SPACE AND PROCESS EFFICIENT MRAM AND METHOD82

OPTIMIZED PHASE CHANGE WRITE METHOD83

PHASE-CHANGE RANDOM ACCESS MEMORY AND

PROGRAMMING METHOD83

MEMORY DEVICE, IN PARTICULAR PHASE CHANGE RANDOM

ACCESS MEMORY DEVICE WITH TRANSISTOR, AND

METHOD FOR FABRICATING A MEMORY DEVICE.83

MEMORY POWER MANAGEMENT.83

MULTI-STEP SELECTIVE ETCHING FOR CROSS-POINT

MEMORY.83

RESISTIVE RANDOM ACCESS MEMORY DEVICE83

MEMORY CELL DEVICE WITH COPLANAR ELECTRODE

SURFACE AND METHOD.83

PROGRAMMABLE RESISTIVE MEMORY CELL WITH SELFFORMING

GAP.84

BRIDGE RESISTANCE RANDOM ACCESS MEMORY DEVICE

WITH A SINGULAR CONTACT STRUCTURE .84

SIDE WALL ACTIVE PIN MEMORY AND MANUFACTURING

METHOD .84

MEMORY ARCHITECTURE AND CELL DESIGN EMPLOYING

TWO ACCESS TRANSISTORS84

MANUFACTURING METHOD FOR PHASE CHANGE RAM WITH

ELECTRODE LAYER PROCESS 84

MEMORY CELL DEVICE AND MANUFACTURING METHOD .84

THIN-FILM FUSE PHASE CHANGE CELL WITH THERMAL

ISOLATION LAYER AND MANUFACTURING METHOD84

METHODS AND APPARATUS FOR A DUAL-METAL MAGNETIC

SHIELD STRUCTURE .85

PROGRAMMABLE RESISTIVE RAM AND MANUFACTURING

METHOD .85

MEMORY EMULATION USING RESISTIVITY-SENSITIVE

MEMORY.85

METHODS OF OPERATING A BI-STABLE RESISTANCE

RANDOM ACCESS MEMORY WITH MULTIPLE MEMORY

LAYERS AND MULTILEVEL MEMORY STATES .85

COMPOSITIONS FOR REMOVAL OF PROCESSING BYPRODUCTS

AND METHOD FOR USING SAME85

THIN-FILM FUSE PHASE CHANGE RAM AND

MANUFACTURING METHOD .85

PHASE CHANGE RANDOM ACCESS MEMORY AND METHOD OF

TESTING THE SAME 86

PHASE-CHANGE RANDOM ACCESS MEMORY (PRAM)

PERFORMING PROGRAM LOOP OPERATION AND METHOD

OF PROGRAMMING THE SAME.86

PHASE CHANGE MATERIALS, PHASE CHANGE RANDOM

ACCESS MEMORIES HAVING THE SAME AND METHODS OF

OPERATING PHASE CHANGE RANDOM ACCESS

MEMORIES.86

PHASE-CHANGE MEMORY DEVICE INCLUDING NANOWIRES

AND METHOD OF MANUFACTURING THE SAME.86

MEMORY CELL SIDEWALL CONTACTING SIDE ELECTRODE86

FERROELECTRIC MEMORY ARRAY FOR IMPLEMENTING A

ZERO CANCELLATION SCHEME TO REDUCE PLATELINE

VOLTAGE IN FERROELECTRIC MEMORY.86

PROGRAMMABLE RESISTIVE RAM AND MANUFACTURING

METHOD .87

METHOD OF CONTROLLING THE RESISTANCE IN A VARIABLE

RESISTIVE ELEMENT AND NON-VOLATILE

SEMICONDUCTOR MEMORY DEVICE87

MEMORY DEVICE AND MANUFACTURING METHOD 87

PROGRAMMABLE RESISTIVE MEMORY WITH DIODE

STRUCTURE.87

PHASE CHANGE RANDOM ACCESS MEMORY .87

MRAM READ BIT WITH ASKEW FIXED LAYER 87

RESISTIVE MEMORY DEVICE 87

SEMICONDUCTOR MEMORY DEVICE 88

SCALEABLE MEMORY SYSTEMS USING THIRD DIMENSION

MEMORY.88

MEMORY USING VARIABLE TUNNEL BARRIER WIDTHS .88

TOGGLE MEMORY BURST.88

MAGNETIC TUNNEL JUNCTION WITH ENHANCED MAGNETIC

SWITCHING CHARACTERISTICS 88

METHOD TO TIGHTEN SET DISTRIBUTION FOR PCRAM88

PHASE CHANGE RANDOM ACCESS MEMORY AND RELATED

METHODS OF OPERATION.88

DAMASCENE PHASE CHANGE RAM AND MANUFACTURING

METHOD .89

METHOD FOR FORMING SELF-ALIGNED THERMAL

ISOLATION CELL FOR A VARIABLE RESISTANCE MEMORY

ARRAY .89

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND

METHOD OF WRITING INTO THE SAME.89

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE.89

CONDUCTIVE MEMORY STACK WITH SIDEWALL89

METHOD FOR MANUFACTURING A RESISTOR RANDOM

ACCESS MEMORY WITH REDUCED ACTIVE AREA AND

REDUCED CONTACT AREAS89

SERIAL MEMORY INTERFACE.89

FERROELECTRIC RANDOM ACCESS MEMORIES (FRAMS)

HAVING LOWER ELECTRODES RESPECTIVELY SELF

ALIGNED TO NODE CONDUCTIVE LAYER PATTERNS AND

METHODS OF FORMING THE SAME 90

SURFACE TOPOLOGY IMPROVEMENT METHOD FOR PLUG

SURFACE AREAS 90

GE PRECURSOR, GST THIN LAYER FORMED USING THE

SAME, PHASE-CHANGE MEMORY DEVICE INCLUDING THE

GST THIN LAYER, AND METHOD OF MANUFACTURING

THE GST THIN LAYER.90

HARDMASK FOR FORMING FERROELECTRIC CAPACITORS IN

A SEMICONDUCTOR DEVICE AND METHODS FOR

FABRICATING THE SAME.90

CURRENT COMPLIANT SENSING ARCHITECTURE FOR

MULTILEVEL PHASE CHANGE MEMORY.90

METHOD FOR MANUFACTURING A NARROW STRUCTURE ON

AN INTEGRATED CIRCUIT .90

THIN-FILM PLATE PHASE CHANGE RAM CIRCUIT AND

MANUFACTURING METHOD .91

MANUFACTURING METHODS FOR THIN-FILM FUSE PHASE

CHANGE RAM91

METHOD FOR MAKING MEMORY CELL DEVICE 91

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND

DATA WRITING METHOD .91

THERMAL ISOLATION FOR AN ACTIVE-SIDEWALL PHASE

CHANGE MEMORY CELL 91

METHOD AND STRUCTURE FOR IMPROVED ALIGNMENT IN

MRAM INTEGRATION91

METHOD FOR SENSING A SIGNAL IN A TWO-TERMINAL

MEMORY ARRAY HAVING LEAKAGE CURRENT.92

MEMORY CELL DEVICE WITH CIRCUMFERENTIALLYEXTENDING

MEMORY ELEMENT.92

PHASE CHANGE MATERIALS AND ASSOCIATED MEMORY

DEVICES .92

NONVOLATILE MEMORY WITH DATA CLEARING

FUNCTIONALITY 92

PHASE-CHANGE RANDOM ACCESS MEMORY EMPLOYING

READ BEFORE WRITE FOR RESISTANCE STABILIZATION92

MEMORY DEVICES HAVING SHARP-TIPPED PHASE CHANGE

LAYER PATTERNS 92

METHOD AND APPARATUS FOR REFRESHING

PROGRAMMABLE RESISTIVE MEMORY .93

MEMORY CELL WITH SEPARATE READ AND PROGRAM PATHS.93

VACUUM JACKETED ELECTRODE FOR PHASE CHANGE

MEMORY ELEMENT.93

FERROELECTRIC RANDOM ACCESS MEMORY DEVICE AND

METHOD OF DRIVING THE SAME 93

METHOD FOR MAKING A SELF-CONVERGED MEMORY

MATERIAL ELEMENT FOR MEMORY CELL93

TWO-ELEMENT MAGNETIC MEMORY CELL 93

METHOD FOR PRODUCTION OF MRAM ELEMENTS 93

THERMALLY INSULATED PHASE CHANGE MEMORY DEVICE .94

MULTI-STATE MAGNETORESISTANCE RANDOM ACCESS CELL

WITH IMPROVED MEMORY STORAGE DENSITY 94

MEMORY ELEMENT WITH REDUCED-CURRENT PHASE

CHANGE ELEMENT94

PHASE CHANGE MEMORY CELL AND MANUFACTURING

METHOD .94

TWO-TERMINAL MEMORY ARRAY HAVING REFERENCE

CELLS94

PHASE CHANGE RANDOM ACCESS MEMORY (PRAM) DEVICE

HAVING VARIABLE DRIVE VOLTAGES .94

VACUUM JACKET FOR PHASE CHANGE MEMORY ELEMENT.94

PHASE CHANGE MEMORY DEVICE AND MANUFACTURING

METHOD .95

SELF-ALIGNED STRUCTURE AND METHOD FOR CONFINING A

MELTING POINT IN A RESISTOR RANDOM ACCESS

MEMORY.95

WRITE DRIVER CIRCUIT FOR CONTROLLING A WRITE

CURRENT APPLIED TO A PHASE CHANGE MEMORY BASED

ON AN AMBIENT TEMPERATURE.95

METHOD FOR TWO-CYCLE SENSING IN A TWO-TERMINAL

MEMORY ARRAY HAVING LEAKAGE CURRENT.95

CONDUCTIVE MEMORY STACK WITH NON-UNIFORM WIDTH .95

PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND

METHOD OF OPERATING THE SAME 95

METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT

FOR STEPPED RESET PROGRAMMING PROCESS ON

PROGRAMMABLE RESISTIVE MEMORY CELL 96

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE.96

METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT

FOR READ BEFORE PROGRAMMING PROCESS ON

MULTIPLE PROGRAMMABLE RESISTIVE MEMORY CELL .96

VERTICAL SIDE WALL ACTIVE PIN STRUCTURES IN A PHASE

CHANGE MEMORY AND MANUFACTURING METHODS96

SINGLE-MASK PHASE CHANGE MEMORY ELEMENT96

SELF-ALIGNED MANUFACTURING METHOD, AND

MANUFACTURING METHOD FOR THIN-FILM FUSE PHASE

CHANGE RAM96

FERROELECTRIC RANDOM ACCESS MEMORY97

PHASE CHANGE MEMORY HAVING MULTILAYER THERMAL

INSULATION97

SPACER ELECTRODE SMALL PIN PHASE CHANGE MEMORY

RAM AND MANUFACTURING METHOD 97

SEMICONDUCTOR STORAGE DEVICE .97

MEMORY WRITE CIRCUIT 97

RESISTANCE RANDOM ACCESS MEMORY DEVICES AND

METHOD OF FABRICATION .97

CONDUCTIVE MEMORY DEVICE WITH CONDUCTIVE OXIDE

ELECTRODES 97

MAGNETIC DEVICES AND TECHNIQUES FOR FORMATION

THEREOF98

RESISTIVE MEMORY DEVICE 98

PIPE SHAPED PHASE CHANGE MEMORY.98

MULTI-RESISTIVE STATE ELEMENT WITH REACTIVE METAL.98

THERMALLY CONTAINED/INSULATED PHASE CHANGE

MEMORY DEVICE AND METHOD (COMBINED) .98

METHODS OF OPERATING A BISTABLE RESISTANCE RANDOM

ACCESS MEMORY WITH MULTIPLE MEMORY LAYERS AND

MULTILEVEL MEMORY STATES.98

SPACER CHALCOGENIDE MEMORY DEVICE.98

TWO-TERMINAL MEMORY ARRAY HAVING REFERENCE

CELLS99

METHOD OF MAKING THREE-DIMENSIONAL, 2R MEMORY

HAVING A 4F2 CELL SIZE RRAM.99

SENSING A SIGNAL IN A TWO-TERMINAL MEMORY ARRAY

HAVING LEAKAGE CURRENT .99

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE.99

FERROELECTRIC RANDOM ACCESS MEMORY CIRCUITS FOR

GUARDING AGAINST OPERATION WITH OUT-OF-RANGE

VOLTAGES AND METHODS OF OPERATING SAME99

FERROELECTRIC RANDOM ACCESS MEMORIES (FRAMS)

HAVING LOWER ELECTRODES RESPECTIVELY SELFALIGNED

TO NODE CONDUCTIVE LAYER PATTERNS AND

METHODS OF FORMING THE SAME 99

TWO-CYCLE SENSING IN A TWO-TERMINAL MEMORY ARRAY

HAVING LEAKAGE CURRENT .100

FERROELECTRIC RANDOM ACCESS MEMORY CAPACITOR

AND METHOD FOR MANUFACTURING THE SAME 100

STRAIN CONTROL OF EPITAXIAL OXIDE FILMS USING

VIRTUAL SUBSTRATES .100

SEPARATE WRITE AND READ ACCESS ARCHITECTURE FOR A

MAGNETIC TUNNEL JUNCTION.100

FERROELECTRIC CAPACITOR WITH PARALLEL RESISTANCE

FOR FERROELECTRIC MEMORY.100

APPARATUS FOR PULSE TESTING A MRAM DEVICE AND

METHOD THEREFORE 100

ENHANCED FUNCTIONALITY IN A TWO-TERMINAL MEMORY

ARRAY .101

LOW POWER MAGNETORESISTIVE RANDOM ACCESS

MEMORY ELEMENTS.101

STORAGE CONTROLLER FOR MULTIPLE CONFIGURATIONS

OF VERTICAL MEMORY 101

RESISTIVE MEMORY DEVICE WITH A TREATED INTERFACE.101

PROVIDING A REFERENCE VOLTAGE TO A CROSS POINT

MEMORY ARRAY.101

INITIALIZING PHASE CHANGE MEMORIES .101

PHASE CHANGE RANDOM ACCESS MEMORY, BOOSTING

CHARGE PUMP AND METHOD OF GENERATING WRITE

DRIVING VOLTAGE 101

THIN-FILM FUSE PHASE CHANGE RAM AND

MANUFACTURING METHOD .102

CONTROL OF SET/RESET PULSE IN RESPONSE TO

PERIPHERAL TEMPERATURE IN PRAM DEVICE102

FERROELECTRIC MEMORY DEVICES HAVING A PLATE LINE

CONTROL CIRCUIT 102

LASER ANNEALING OF COMPLEX METAL OXIDES (CMO)

MEMORY MATERIALS FOR NON-VOLATILE MEMORY

INTEGRATED CIRCUITS .102

READ BIAS SCHEME FOR PHASE CHANGE MEMORIES102

FERROELECTRIC MEMORY WITH WIDE OPERATING VOLTAGE

AND MULTI-BIT STORAGE PER CELL102

CIRCUITS FOR DRIVING FRAM102

FERROELECTRIC RANDOM ACCESS MEMORY103

INTEGRATED CIRCUIT HAVING A RESISTIVE MEMORY 103

SERIAL TRANSISTOR-CELL ARRAY ARCHITECTURE 103

PHASE CHANGE RANDOM ACCESS MEMORY DEVICE HAVING

VARIABLE DRIVE VOLTAGE CIRCUIT.103

CHAIN FERROELECTRIC RANDOM ACCESS MEMORY (CFRAM)

HAVING AN INTRINSIC TRANSISTOR CONNECTED IN

PARALLEL WITH A FERROELECTRIC CAPACITOR 103

MAGNETIC FILM STRUCTURE USING SPIN CHARGE, A

METHOD OF MANUFACTURING THE SAME, A

SEMICONDUCTOR DEVICE HAVING THE SAME, AND A

METHOD OF OPERATING THE SEMICONDUCTOR DEVICE.103

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE.103

FERROELECTRIC RANDOM ACCESS MEMORY DEVICE104

MAGNETO-RESISTIVE RANDOM ACCESS MEMORY

SIMULATION .104

PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND

METHOD FOR MANUFACTURING THE SAME .104

MRAM READ SEQUENCE USING CANTED BIT

MAGNETIZATION .104

NONVOLATILE MEMORY SYSTEM USING MAGNETORESISTIVE

RANDOM ACCESS MEMORY (MRAM)104

THIN-FILM PLATE PHASE CHANGE RAM CIRCUIT AND

MANUFACTURING METHOD .104

CROSS-POINT RRAM MEMORY ARRAY HAVING LOW BIT LINE

CROSSTALK .104

DRIVING METHOD OF VARIABLE RESISTANCE ELEMENT AND

MEMORY DEVICE.105

TWO-TERMINAL MEMORY ARRAY HAVING REFERENCE

CELLS105

CROSS-POINT MEMORY ARRAY WITH FAST ACCESS TIME .105

PHASE CHANGE RANDOM ACCESS MEMORY (PRAM) DEVICE .105

MAGNETIC ELEMENT UTILIZING SPIN-TRANSFER AND HALFMETALS

AND AN MRAM DEVICE USING THE MAGNETIC

ELEMENT .105

SYNTHETIC ANTIFERROMAGNET STRUCTURES FOR USE IN

MTJS IN MRAM TECHNOLOGY105

FERROELECTRIC CAPACITOR STACK ETCH CLEANING

METHODS.105

METHOD FOR MANUFACTURING MAGNETO-RESISTIVE

RANDOM ACCESS MEMORY.106

FERROELECTRIC RANDOM ACCESS MEMORY DEVICE AND

METHOD FOR DRIVING THE SAME106

SELF-ALIGNED SMALL CONTACT PHASE-CHANGE MEMORY

METHOD AND DEVICE106

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF

MANUFACTURING THE SAME 106

METHOD OF PATTERNING A MAGNETIC TUNNEL JUNCTION

STACK FOR A MAGNETO-RESISTIVE RANDOM ACCESS

MEMORY.106

CHEMICAL MECHANICAL POLISH OF PCMO THIN-FILMS FOR

RRAM APPLICATIONS106

MRAM MEMORY WITH RESIDUAL WRITE FIELD RESET107

MAGNETO-RESISTIVE RANDOM ACCESS MEMORY AND

DRIVING METHOD THEREOF107

PLATELINE VOLTAGE PULSING TO REDUCE STORAGE NODE

DISTURBANCE IN FERROELECTRIC MEMORY.107

SEMICONDUCTOR MEMORY DEVICE HAVING REDUNDANCY

CELL ARRAY SHARED BY A PLURALITY OF MEMORY CELL

ARRAYS.107

METHOD FOR PRODUCTION OF MRAM ELEMENTS 107

CONDUCTIVE MEMORY STACK WITH SIDEWALL107

MAGNETIC SWITCHING WITH EXPANDED HARD-AXIS

MAGNETIZATION VOLUME AT MAGNETO-RESISTIVE BIT

ENDS107

METHOD AND SYSTEM FOR PROVIDING CURRENT BALANCED

WRITING FOR MEMORY CELLS AND MAGNETIC DEVICES.108

FERROELECTRIC CAPACITOR HYDROGEN BARRIERS AND

METHODS FOR FABRICATING THE SAME .108

ETCH-STOP MATERIAL FOR IMPROVED MANUFACTURE OF

MAGNETIC DEVICES .108

BIT END DESIGN FOR PSEUDO SPIN VALVE (PSV) DEVICES 108

FERROELECTRIC CAPACITOR WITH PARALLEL RESISTANCE

FOR FERROELECTRIC MEMORY.108

ONE-MASK PT/PCMO/PT STACK ETCHING PROCESS FOR RRAM

APPLICATIONS108

MAGNETO-RESISTIVE RANDOM ACCESS MEMORY DEVICES

AND METHODS FOR FABRICATING THE SAME109

DEVICE AND METHOD FOR GENERATING REFERENCE

VOLTAGE IN FERROELECTRIC RANDOM ACCESS MEMORY

(FRAM) .109

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF

READING DATA.109

LINE DRIVER THAT FITS WITHIN A SPECIFIED LINE PITCH109

METHOD OF SUBSTRATE SURFACE TREATMENT FOR RRAM

THIN-FILM DEPOSITION 109

TRIPLE PULSE METHOD FOR MRAM TOGGLE BIT

CHARACTERIZATION.109

FERROELECTRIC CAPACITOR HAVING A SUBSTANTIALLY

PLANAR DIELECTRIC LAYER AND A METHOD OF

MANUFACTURE THEREFOR109

MRAM ARCHITECTURE WITH ELECTRICALLY ISOLATED

READ AND WRITE CIRCUITRY 110

MEMORY ARRAY OF A NON-VOLATILE RAM .110

PROVIDING A REFERENCE VOLTAGE TO A CROSS POINT

MEMORY ARRAY.110

FERROELECTRIC CAPACITOR AND METHOD FOR

MANUFACTURING THE SAME 110

SERIAL TRANSISTOR-CELL ARRAY ARCHITECTURE 110

METHODS FOR FABRICATING A MAGNETIC KEEPER FOR A

MEMORY DEVICE.110

METHOD AND APPARATUS TO REDUCE STORAGE NODE

DISTURBANCE IN FERROELECTRIC MEMORY.110

MAGNETO-RESISTIVE RANDOM ACCESS MEMORY DEVICE

STRUCTURES AND METHODS FOR FABRICATING THE

SAME .111

NON-VOLATILE MEMORY WITH A SINGLE TRANSISTOR AND

RESISTIVE MEMORY ELEMENT .111

REFERENCE VOLTAGE GENERATING APPARATUS FOR USE IN

A FERROELECTRIC RANDOM ACCESS MEMORY (FRAM)

AND A DRIVING METHOD THEREFOR 111

ARCHITECTURES FOR CPP RING SHAPED (RS) DEVICES.111

CONDUCTIVE MEMORY ARRAY HAVING PAGE MODE AND

BURST MODE WRITE CAPABILITY.111

RE-WRITABLE MEMORY WITH MULTIPLE MEMORY LAYERS 111

MULTI-STATE MAGNETO-RESISTANCE RANDOM ACCESS

CELL WITH IMPROVED MEMORY STORAGE DENSITY .112

FERROELECTRIC MEMORY DEVICE 112

SPIN BARRIER ENHANCED MAGNETO-RESISTANCE EFFECT

ELEMENT AND MAGNETIC MEMORY USING THE SAME.112

MULTI-RESISTIVE STATE ELEMENT WITH REACTIVE METAL.112

LAYOUT OF DRIVER SETS IN A CROSS-POINT MEMORY ARRAY112

CIRCUIT AND METHOD FOR REDUCING FATIGUE IN

FERROELECTRIC MEMORIES112

METHOD AND APPARATUS FOR SIMULATING A MAGNETORESISTIVE

RANDOM ACCESS MEMORY (MRAM)112

TWO-TERMINAL MEMORY ARRAY HAVING REFERENCE

CELLS113

FERROELECTRIC RANDOM ACCESS MEMORY DEVICE AND

CONTROL METHOD THEREOF113

MULTI-RESISTIVE STATE MATERIAL THAT USES DOPANTS113

CONDUCTIVE MEMORY DEVICE WITH CONDUCTIVE OXIDE

ELECTRODES 113

PCMO THIN-FILM WITH RESISTANCE RANDOM ACCESS

MEMORY (RRAM) CHARACTERISTICS.113

SEMICONDUCTOR STORAGE DEVICE .113

PHASE-CHANGE RANDOM ACCESS MEMORY DEVICE AND

METHOD FOR MANUFACTURING THE SAME .113

LOW TEMPERATURE DEPOSITION OF COMPLEX METAL

OXIDES (CMO) MEMORY MATERIALS FOR NON-VOLATILE

MEMORY INTEGRATED CIRCUITS.114

NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE114

SEMICONDUCTOR MEMORY DEVICE 114

FERROELECTRIC MEMORY WITH AN INTRINSIC ACCESS

TRANSISTOR COUPLED TO A CAPACITOR.114

ADAPTIVE PROGRAMMING TECHNIQUE FOR A RE-WRITABLE

CONDUCTIVE MEMORY DEVICE 114

CROSS-POINT MEMORY ARCHITECTURE WITH IMPROVED

SELECTIVITY.114

METHOD FOR FABRICATING FERROELECTRIC RANDOM

ACCESS MEMORY DEVICE.115

BIAS-ADJUSTED MAGNETO-RESISTIVE DEVICES FOR

MAGNETIC RANDOM ACCESS MEMORY (MRAM)

APPLICATIONS115

MEMORY ARRAY WITH HIGH TEMPERATURE WIRING 115

SPACER CHALCOGENIDE MEMORY METHOD.115

METHOD OF AFFECTING RRAM CHARACTERISTICS BY

DOPING PCMO THIN-FILMS.115

MRAM DEVICE INTEGRATED WITH OTHER TYPES OF

CIRCUITRY.115

EPIR DEVICE AND SEMICONDUCTOR DEVICES UTILIZING

THE SAME 115

TUNNELING ANISOTROPIC MAGNETO-RESISTIVE DEVICE

AND METHOD OF OPERATION116

PSEUDO TUNNEL JUNCTION 116

TERMINAL TRAPPED CHARGE MEMORY DEVICE WITH

VOLTAGE SWITCHABLE MULTI-LEVEL RESISTANCE 116

DISCHARGE OF CONDUCTIVE ARRAY LINES IN FAST

MEMORY.116

CROSS-POINT ARRAY USING DISTINCT VOLTAGES 116

LOW SILICON-HYDROGEN SIN LAYER TO INHIBIT

HYDROGEN-RELATED DEGRADATION IN

SEMICONDUCTOR DEVICES HAVING FERROELECTRIC

COMPONENTS.116

COMPOSITIONS FOR REMOVAL OF PROCESSING BYPRODUCTS

AND METHOD FOR USING SAME117

MAGNETO-RESISTIVE RANDOM ACCESS MEMORY WITH HIGH

SELECTIVITY.117

MAGNETO-RESISTIVE RANDOM ACCESS MEMORY.117

LINE DRIVERS THAT USE MINIMAL METAL LAYERS117

CONDUCTIVE MEMORY STACK WITH NON-UNIFORM WIDTH .117

ZERO CANCELLATION SCHEME TO REDUCE PLATELINE

VOLTAGE IN FERROELECTRIC MEMORY.117

3D RRAM117

MRAM STORAGE DEVICE118

METHOD OF FORMING AND USING A HARDMASK FOR

FORMING FERROELECTRIC CAPACITORS IN A

SEMICONDUCTOR DEVICE118

HYDROGEN-LESS CVD TIN PROCESS FOR FERAM VIA0

BARRIER APPLICATION118

NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND

CONTROL METHOD THEREOF118

CROSS-POINT MEMORY ARRAY EXHIBITING A

CHARACTERISTIC HYSTERESIS .118

NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, AND

PROGRAMMING METHOD AND ERASING METHOD

THEREOF118

SERIES CONNECTED TC UNIT TYPE FERROELECTRIC RAM

AND TEST METHOD THEREOF119

HYDROGEN BARRIER FOR PROTECTING FERROELECTRIC

CAPACITORS IN A SEMICONDUCTOR DEVICE AND

METHODS FOR FABRICATING THE SAME .119

BRIDGE-TYPE MAGNETIC RANDOM ACCESS MEMORY (MRAM)

LATCH.119

METHOD FOR READING A PASSIVE MATRIX-ADDRESSABLE

DEVICE AND A DEVICE FOR PERFORMING THE METHOD119

FERROELECTRIC CAPACITOR HYDROGEN BARRIERS AND

METHODS FOR FABRICATING THE SAME .119

PATENT ANALYSIS 120

TABLE 10 NUMBER OF U.S. PATENTS GRANTED TO COMPANIES FOR

NON-VOLATILE EMERGING MEMORY TECHNOLOGIES FROM 2006

THROUGH APRIL 2010120

FIGURE 16 NUMBER OF U.S. PATENTS GRANTED TO COMPANIES FOR

NON-VOLATILE EMERGING MEMORY TECHNOLOGIES FROM 2006

THROUGH APRIL 2010121

INTERNATIONAL OVERVIEW OF U.S. PATENT ACTIVITY IN

EMERGING NON-VOLATILE RANDOM ACCESS MEMORY.122

TABLE 11 NUMBER OF U.S. PATENTS GRANTED TO COMPANIES FOR

NON-VOLATILE EMERGING MEMORY PRODUCTS BY REGION FROM

2006 THROUGH APRIL 2010.122

9. COMPANY PROFILES

COMPANY PROFILES 123

4DS, INC.123

ADESTO TEHNOLOGIES.124

ADVANCED MATERIALS INNOVATION CENTER (AMIC) 124

BAE SYSTEMS PLC.125

CROCUS TECHNOLOGY125

CYPRESS SEMICONDUCTOR CORPORATION126

ELPIDA MEMORY, INC. .126

EVERSPIN TECHNOLOGIES, INC. 127

FUJITSU COMPONENTS AMERICA, INC. 127

GRANDIS, INC. 128

HEWLETT-PACKARD COMPANY.128

HONEYWELL INTERNATIONAL INC129

HYNIX SEMICONDUCTOR AMERICA INC. 129

INTERNATIONAL BUSINESS MACHINES (IBM) CORPORATION.130

IM FLASH TECHNOLOGIES, LLC131

IMEC BELGIUM 131

INFINEON TECHNOLOGIES AG132

INNOVATIVE SILICON, INC. 132

INTEL CORPORATION.133

MACRONIX INTERNATIONAL CO., LTD. .133

MATSUSHITA ELECTRIC INDUSTRIAL CORPORATION (PANASONIC)133

MICROMEM TECHNOLOGIES INC134

MICRON TECHNOLOGY, INC. 134

MOSYS, INC .135

NETRINO, LLC.135

NANTERO, INC. .135

NUMONYX.136

NVE CORPORATION 136

OVONYX, INC. .137

QS SEMICONDUCTOR CORP. .137

RAMTRON INTERNATIONAL CORPORATION138

RENESAS ELECTRONICS CORPORATION (HITACHI) 138

SAMSUNG SEMICONDUCTOR.139

SHARP LABORATORIES OF AMERICA.140

ST MICROELECTRONICS140

SYMETRIX CORPORATION.140

TEXAS INSTRUMENTS INC. .141

THIN FILM ELECTRONICS AB.141

TOSHIBA142

UNITY SEMICONDUCTOR CORPORATION.142

UNITY SEMICONDUCTOR CORPORATION (CONTINUED) .143

10. ANNECTURE A- EXPLANATION OF TERMINOLOGIES

ANNEXURE A 144

EXPLANATIONS OF TERMINOLOGIES APPLICABLE TO

CONVENTIONAL NON-VOLATILE RANDOM ACCESS MEMORY

(RAM) .144

PROM.144

EPROM144

EEPROM145

DRAM .145

DRAM ISSUES .145

SRAM.146

NVSRAM146