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Flip-Chip Packages accounted for 13% of all integrated circuit (IC) packages by the end of 2010, but this was worth over 29% of the Global IC assembly, packaging and test market.
Throughout this report on flip-chip technologies and markets, you will find out how this market emerged almost from scratch 15 years ago and turned into a $16 billion plus market, and why analysts think that even though it is a large market by the figures and looks mature at first sight, that it is still in its growth phase, with major technology and application and supply chain transformations looming ahead.
Renewed interest in flip-chip technologies is motivated in many application areas concurrently by such factors as the rising cost of gold used for wire bonding, the need for low thickness devices, continued CMOS downscaling, higher currents and temperatures, and lower voltages.
Today, many sophisticated devices can no longer be packaged with wire bonding technology and the mobile applications are increasingly requiring footprint and weight reduction coupled with higher electrical performance (signal propagation and power distribution). The emergence of the 28nm CMOS technology node in particular, poses new quality and reliability constraints on interconnect technologies so as to cope with the increasing fragility of the back end of line, which may disqualify wire bonding. Not to mention the ever increasing IO density, making it necessary to develop new bumping and substrate technologies. It is not any longer only about higher performance and lower cost reliable interconnects or assembly and packaging technologies. If remained unresolved, the above constraints will prove to be bottlenecks if not obstacles to the continuation of Moore’s law.
A Segmented Market With Diverse "Realities"
Summarizing the flip-chip market and its dynamics with just a few words and figures can be misleading, as there is a wide diversity of flip-chip technologies and applications, with different drivers, levels of maturity and sometimes alternative technologies. To some, flip-chip applies to large digital system-on-chip devices like microprocessors, graphical processor units or chipsets for personal computers and gaming stations. Yet, flip-chip applies to a number of different applications addressing different packaging forms. Flip-chip applies not only to packages but also to interconnection of bare integrated circuits, like the display drivers found around all LCD screens worldwide; and flip-chip packages can address devices with die sizes ranging from less than 1mm² up to the maximum die sizes (around 650mm²).
The flip-chip market is undergoing major technology and supply chain transformations which this report describes along with their impacts on the semiconductor industry for the coming 5 years.
These are some of the questions addressed through the 360-degree analysis of the World’s highest value semiconductor packaging technology.
Focus of the Report
Throughout this report, you will find everything you should know about flip-chip:
The list and ranking of the main substrate, underfill and wafer bumping players is also detailed as of the end of 2010, including the detailed respective production capacities for wafer bumping.
Who Should Buy This Report
-Visualize the drivers and expected benefits by application of flip-chip as well as the alternative options
-Benchmark the industry status of flip-chip
-Identify possible partnership /or second source packaging subcontractors for your forthcoming developments
-Benchmark the industry status of flip-chip. Evaluate your market and technology position
-Screen possible new applications and technologies to support diversification strategy with flip-chip technologies
-Screen possible new applications and technologies to support diversification strategy with wafer bumping
-Understand the differentiated value of your products and technologies in this large and fast growing market
-Identify new business opportunities and prospects
- Evaluate the benefits of using flip-chip devices in your end system
-Monitor different suppliers to adjust your sourcing strategy
-Monitor the evolution of IC packaging, assembly and test, especially linked to the emerging 3D silicon/glass interposers and other 3D silicon technologies. Evaluate opportunities and threats for the flip-chip substrate market.
-Screen possible new applications and technologies to support diversification strategy with flip-chip substrates
TABLE OF CONTENTS
1 - SCOPE OF THE REPORT & DEFINITIONS
2 - EXECUTIVE SUMMARY
3 - MARKET FORECASTS (2011-2016)
Flip-chip packages (Mu) by end application
Flip-chip packages (Mu) by device type
RDL and wafer bumping by application (kWafers)
RDL and wafer bumping by wafer size (kWafers)
RDL and wafer bumping by front-end (CMOS) process node (kWafers)
Flip-chip package and assembly market value by process step (M$)
Equipment and material volumes and costs
4 - PROCESS FLOW AND TECHNOLOGIES
Flip-chip package platforms
Flip-chip and assembly process flows
Redistribution layers
Lead-free regulations
Bumping technologies & 1st interconnect pitches
Copper Pillars
Flip-Chip substrates : technologies, players, trends and 2010 market status
Pick, flip and place
Underfilling
Fluxing
Thermal Interface Materials
Flip-Chip roadmap
5 - APPLICATIONS AND DRIVERS OF FLIP-CHIP
1. End-Market drivers for flip-chip
Computing
Handsets
Telecom & Infrastructures
Network servers
Consumer
Medical
Automotive
Military & Aerospace
2. Application focus for:
Microprocessors (MPU’s)
Graphical processor units (GPU’s)
Chipsets
ASICs
FPGAs
DDR memories
Application processors (APE’s)
Baseband ICs
Transceivers
Front-end modules
High power LEDs
LCD drivers
CMOS image sensors
DSPs
SAW + BAW filters
6 - COSTS STRUCTURE, FLIP-CHIP MANUFACTURING & ASSEMBLY
Costs of RDL and wafer bumping
Cost of substrates
Cost of assembly
7 - SUPPLY CHAIN ANALYSIS
Manufacturing and sourcing strategies
Players and technologies
RDL and bumping « mid-end » Wafer foundries
8 - ROADMAPS AND PERSPECTIVES
9 - CONCLUSIONS
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