This report examines and projects the technologies involved, their likely developments, what problems and choices are facing users, and where the opportunities and pitfalls are. The worldwide markets are analyzed and projected.

TABLE OF CONTENTS

Chapter 1 Introduction                            

Chapter 2 Executive Summary                       

2.1   Summary of Technology Issues                
2.2   Summary of Market Forecasts                 

Chapter 3 Technology Issues and Trends            

3.1  Overview of HDP Technology                    
     3.1.1 Need for Multiple IC Integration        
     3.1.2 Challenges of Multiple IC Integration  
3.2 Technical Constraints of Integration          
3.3 Economic Benefits of HDP                      
3.4 Technology Issues                              
     3.4.1 Substrates                              
     3.4.2 Conductors                              
     3.4.3 Dielectrics                             
     3.4.4 Vias                                    
     3.4.5 Die Attachment                          
     3.4.6 Next Level Interconnection              
     3.4.7 Thermal Management                      
     3.4.8 Test and Inspection                    
     3.4.9 Design                                 
3.5 3-D Modules                                   
3.6 Superconducting Interconnects                 
3.7 Known Good Die                                
3.8 System In Package (SIP)                       
3.9 Multichip Package                             
3.10 Package-On-Package (PoP)                      
                                      
Chapter 4 Applications                           

4.1   Overview of HDP Applications               
4.2   Military and Aerospace                     
4.3   Computer and Peripheral Equipment          
4.4   Communications                             
4.5   Consumer                                   
4.6   Industrial                                 

Chapter 5 Competitive Environment                

5.1 Overview of the HDP Competitive Environment  
5.2 Joint Ventures and Cooperative Agreements    
5.3 HDP Manufacturers                            
Advanced Packaging Systems                       
Aeroflex Laboratories                            
AMD                                              
AMITEC                                           
Amkor Electronics                                
Analog Devices                                   
Appian Technology                                
AT&T                                             
Ceramic Packaging                               
ChipSiP                                          
C-MAC MicroTechnology                            
CNM-IMB                                          
Conexant                                         
Control Data                                     
CTM Electronics                                  
CTS                                              
David Sarnoff Research Center                   
Delco Electronics                               
Digital Equipment                                
Elpaq                                                                                  
Elpida                                
ERIM                                  
Eureka                                
Fujitsu                               
GEC Plessey                           
General Electric                      
Hadco                                 
Honeywell                             
Hughes                                
Hynx                                  
Ibiden                                
IBM                                   
ILC Data Device Corp.                 
IMEC                                  
Infineon                              
Interconnect Systems                  
Interconnex                           
International Micro Industries        
Integrated System Assemblies          
Intersil                              
Kodak                                 
Kyocera                               
Lexmark International                 
Lucent Technologies                   
MicroModule Systems                   
Micron                                
Mitsubishi                            
Motorola                              
nCHIP                                 
NEC                                   
Pacific Microelectronics              
Pacific Microelectronics Centre       
Packard-Hughes Interconnect           
Panda Project                                                           
Phillips Laboratory                     
Philips                                 
Pico Systems                            
Quadrant Technology                     
Renasas                                 
RISH                                    
Rockwell Avionics                       
Rogers                                  
S3                                      
Samsung Electronics                     
Sensonix                                
Sharp                                   
Sheldahl                                
Shinko                                  
S-MOS Systems                           
Spansion                                
Spectra                                 
Tektronix                               
Teledyne Electronic Technologies        
Tessera                                 
Texas Instruments                       
Thomson Consumer Electronics            
Toshiba                                 
TRW                                     
United Technologies                     
White Electronic Designs                
W.L. Gore & Associates                  
Z Systems                                
                               
Chapter 6 3-D-TSV Technology                

6.1    Driving Forces In 3D-TSV             
6.2    3-D Package Varieties                
6.3    TSV Processes                        
6.4    Critical Processing Technologies      
       6.4.1 Plasma Etch Technology          
       6.4.2 Cu Plating                      
       6.4.3 Thin Wafer Bondling             
       6.4.4 Wafer Thinning/CMP              
       6.4.5 Lithography                    
6.5 Applications                            
6.6 Limitations Of 3-DPackaging Technology   
       6.6.1 Thermal Management              
       6.6.2 Cost                            
       6.6.3 Design Complexity               
       6.6.4 Time To Delivery               
6.7 Company Profiles                        
ASE                                         
ALLVIA                                      
Amkor                                       
BeSang                                      
Chartered Semiconductor                     
Cubic Wafer                                 
Elpida Memory                               
Freescale                                   
Fujikura                                    
IBM                                         
Infineon                                    
Intel                                       
Jazz Semiconductor                          
Micron Technology                           
NEC                                         
NXP                                          



                                    
Oki Electric                                                
Renesas                                                     
Samsung                                                     
Sharp                                                       
Silex Microsystems                                          
STATS ChipPAC                                               
STMicroelectronics                                          
Tessera                                                     
Tezzaron                                                    
Toshiba                                                     
TSMC                                                        
UTAC                                                        
Ziptronix                                                   
ZyCube                                                      

Chapter 7 Market Forecast                                   

7.1   Overview of Multichip Modules                         
7.2   Driving Forces                                        
7.3   Alternative Packaging Technologies                    
7.4   Worldwide IC Market Forecast                          
7.5   Worldwide Packaging Market Forecast                   
7.6   Worldwide MCM Market Forecast                          
      7.6.1 Worldwide Forecast By Substrate Type             
      7.6.2 Worldwide 3-D Through Silicon Via (TSV) Market   
      7.6.2 Market Forecast By Application                   
      7.6.3 Market Forecast By End Use                      
7.7   Wafer Level Packaging                                  

LIST OF TABLES
                                                           
3.1  Multichip Modules Vs. Circuit Board Assemblies        
3.2  MCM Cost Comparison                                   
3.3  Substrate Technology Features                         
3.4  Metal Conductors in MCMs                              
3.5  Comparison of Thin-Film and Thick-Film Technologies   
3.6  Characteristics of Dielectric Materials               
3.7  CTE of Common Substrates and Adhesives                
3.8  Comparison of MCM Testers                             
3.9  Density Comparisons of Single Package and 3-D MCM     
5.1  MCM Manufacturers                                     
6.1  3-D Mass Memory Volume Comparison Between Other        
     Technologies and TI's 3D Technology In Cm3/Gbit
6.2 3-D Mass Memory Weight Comparison Between Other         
     Technologies and TI's 3D Technology In Grams3/Gbit
6.3 Institutions Working In The Area Of 3D TSV             
6.4 Companies Working In The Area OF 3D TSV                
7.1 Worldwide IC Package Market Forecast                   
7.2 Worldwide I/O Package Market Forecast                  
7.3 Worldwide MCM Market                                   
7.4 Worldwide MCM-C Market By Application                  
7.5 Worldwide MCM-D Market By Application                  
7.6 Worldwide MCM-L (MCM, SiP, MCP) Market By Application  
7.7 Worldwide MCM Market By Application                    
7.8 Worldwide Market Of End Use Applications               
7.9 WLP Demand By Device                                   
7.10 WLP Demand By Device                                   
                                  
LIST OF FIGURES
                                                        
1.1   Schematic Cross-Section View Of An MCM-D                    
1.2   Cross-Section Of The RF And Microwave MCM-D Structure       
1.3   Thin Film Layers On The Planarized Core Layer Of MCM-SL/D Technology                                                  
1.4   Flip Chip MCP                                               
1.5   SIP Cross Section                                           
3.1   IC Packaging Trends                                         
3.2   Technology Tree For HDP Types                               
3.3   Form Factor Decrease By Package Type                        
3.4   High Power Package Technology Roadmap                       
3.5   Comparison Between Wire Bonding And Bump                    
6.1   3-D Through-Silicon Via (TSV)                               
6.2   Silicon Efficiency Comparison Between 3D Packaging           
      Technology And Other Conventional Packaging Technologies
6.3   Comparison Between 2D And 3D Packaging Interms Of The        
      Accessability And Useablity Of Interconnection
6.4   3D Packages                                                 
6.5   Through-Silicon Via (TSV)                                   
6.6   Moore's Law For Active Element Density                      
7.1   Comparison Of SOC, MCM, SIP, And SOP                        
7.2   Materials Integrated In The SOP Concept                     
7.3   Digital, RF And Optical Function Integration In One SOP Package                                                     
7.4   Substrate Warpage Control                                   
7.5   Effect Of Elastic Modulus On Sop Package Substrate Warpage  
7.6   Area Assembly Pitch Reduction                               
7.7   Summary Of Package/Board Materials With Modulus And CTE     
7.8   Low Loss Dielectrics And Future Requirements                
7.9   Eye Opening Measurements For Low Loss Dielectrics At 5 Gbps Data Rate                                                                                   
7.10 Projection of 3-D TSV Applications And Process Requirement  
7.11 Market Forecast of 3-D TSV Wafers