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The 2011 IC Economics report is a comprehensive overview of the economics of Integrated Circuit manufacturing and the IC industry in general. The product is designed to provide a broad understanding of Integrated Circuit manufacturing costs and presents a great deal of benchmarking data. A high level discussion of the economics of the IC industry with market and cost trends is also included. This product is not a cookbook for cost calculations. If you want to calculate product costs we recommend the IC Cost and Price Model.
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TABLE OF CONTENTS
1 Introduction
2 IC Market Status and Trends
2.1 Worldwide semiconductor revenue trend
2.2 Detailed 2011 IC forecast
2.3 The status of the recovery
2.4 Semiconductor revenue by region
2.5 Semiconductor revenue by end use
2.6 Semiconductor revenue by product
2.7 Top 10 semiconductor companies
2.8 Further reading
2.9 References
3 Capital and Materials Spending
3.1 Capital spending analysis
3.2 Semiconductor materials market
3.3 References
4 Economics Trends
4.1 Introduction
4.2 Product pricing trends
4.3 Product cost trend
4.4 Fabrication facility cost trends
4.5 Effect of utilization on profitability
4.6 Profit and loss trends
4.7 Leasing trends
4.8 R&D spending
4.9 Fabs - build or buy and where to build
4.10 Memory trends
4.11 References
5 300mm and 450mm
5.1 Introduction
5.2 300mm status
5.3 300mm fab costs
5.4 300mm ramp versus 200mm ramp
5.5 Revenue required to support a 300mm fab
5.6 300mm cost savings
5.7 300mm strategies and impact for leading semiconductor companies
5.8 300mm analog fabs
5.9 450mm
5.10 Further information
5.11 References
6 Foundries
6.1 Introduction
6.2 The genesis of the pure play foundry
6.3 The growth years
6.4 The foundry model
6.5 Utilization effects on the foundry model
6.6 Foundry yields
6.7 Technology transitions
6.8 Average Selling Prices
6.9 Shake-up in the foundry landscape
6.10 What do these trends mean for the future of foundries?
6.11 References
7 Design
7.1 Introduction
7.2 Design productivity
7.3 Factors influencing design productivity
7.4 Design costs
7.5 Mask costs
7.6 Design issues at 90nm and 65nm
7.7 Design issues at 32nm and 28nm
7.8 Conclusion
7.9 References
8 Integrated Circuit Manufacturing Overview
8.1 Silicon wafer manufacturing
8.2 Wafer fabrication
8.3 Cleanroom technology
8.4 Electrical tests
8.5 Packaging
8.6 References
9 Wafer Fabrication Costs
9.1 Accounting categories and cost map
9.2 Material costs
9.3 Direct labor costs
9.4 Capital costs
9.5 Indirect labor costs
9.6 Toolset repair costs
9.7 Monitor wafer costs
9.8 Facilities costs
9.9 Consumable items costs
9.10 Unyielded wafer cost trends
9.11 Wafer yields
9.12 Yielded Wafer costs
9.13 Additional resources
9.14 References
10 Test and Packaging Costs
10.1 Test costs
10.2 Packaging
10.3 Additional resources
10.4 References
11 Die Yield and Product Costs
11.1 Gross die per wafer
11.2 Defect density concept
11.3 Yield models
11.4 Defect density trends
11.5 Recommended defect densities
11.6 Yield Trends
11.7 Product cost examples
11.8 Additional resources
11.9 References
12 Cycle Time and Utilization
12.1 Definitions
12.2 OEE is wrong
12.3 Economic value of cycle time
12.4 Managing cycle time
12.5 Cost of ownership
12.6 Equipment uptime
12.7 How the factory effects cost
12.8 Throughput benchmarks
12.9 References
13 Technology Trends
13.1 Transistors per IC
13.2 Die size
13.3 Photolithography trends
13.4 MOSFET scaling
13.5 Strain engineering
13.6 Gate oxide scaling and high-k gate oxides
13.7 SOI
13.8 Interconnect
13.9 DRAM technology
13.10 Flash Technology
13.11 Conclusion
13.12 References
14 Glossary
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