The IC Cost and Price Model allows users to easily estimate the cost and price of most low power silicon-based ICs such as SOCs, microprocessors, ASICs, DRAM, NAND and more. The IC Model is very easy to use, the user only has to make eight selections or entry's and there is help for many of them. The model then presents a detailed analysis of cost and pricing and offers over seventy options for customization. Cost includes wafer fabrication, wafer test, packaging and final test.
The Strategic Cost and Price Model - 2019 is now available with eight new fabs, expanded logic and DRAM process coverage, updated data and many other enhancements. Specifically the model covers: DRAM - Samsung, Micron and SK Hynix, Foundry - TSMC, Global Foundries, Samsung, IDM Logic - Intel MPU and ST Micro, NAND - Samsung, Toshiba, and Intel-Micron and 2D and 3D NAND, 3D XPoint for Intel-Micron.
The Assembly and Test Cost and Price model covers wafer sorts, assembly of leadframe and organic substrates packages including EMIB, wafer level packaging and InFO and class test. The model is user customizable and we are continually adding new features.
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