IPC/JPCA-2291 Design Guideline for Printed Electronics

IPC/JPCA-2291 Design Guideline for Printed Electronics

IPC, Date of Publication: Aug 1, 2013, 24 Pages
US$85.00
IPC/JPCA-2291

The electronics manufacturing industry's first design guidelines for printed electronics, "IPC/JPCA-2291, Design Guidelines for Printed Electronics", was released by IPC — Association Connecting Electronics Industries® and JPCA. Providing much needed guidance for consistent, manufacturable design requirements for printed electronics, IPC/JPCA-2291 together with IPC/JPCA-4921, Requirements for Printed Electronics Base Materials, and IPC/JPCA-4591, Requirements for Printed Electronics Functional Materials, establish a firm foundation for this technology alternative that is being used in a growing number of applications.

This guideline provides an overview of the design process flow for printed electronics based devices, modules and units, and final products. The intent of IPC/JPCA-2291 is to establish a design process flow that will facilitate and improve the practice of printed electronics design. IPC/JPCA-2291 identifies documents such as standards that can be used to assist during the design process flow.

TABLE OF CONTENTS

1 SCOPE
1.1 Purpose   1
1.2 Intent   1
1.3 Printed Electronics Document Hierarchy  1
1.4 Qualification   2
1.5 Procurement Documentation  2
1.6 As Agreed Upon Between User and Supplier (AABUS)  2
1.7 Interpretation  2
1.8 Presentation  2

2 APPLICABLE DOCUMENTS

2.1 IPC  2
2.2 NCSL International  2
2.3 ISO  2

3 TERMS AND DEFINITIONS
3.1 base material*  3
3.2 barrier   3
3.3 fiducial mark  3
3.4 functional biologically active material  3
3.5 functional chemically active material  3
3.6 functional conductive material  3
3.7 functional dielectric material   3
3.8 functional material   3
3.9 functional optically active material   3
3.10 functional semiconductive material   3
3.11 functional thermally active material  4
3.12 hybrid structure  4
3.13 in-body  4
3.14 nonfunctional material   4
3.15 nonprinted conductor   4
3.16 on-body   4
3.17 printed electronics based devices  4
3.18 printed electronics based material   4
3.19 printed electronics based process  4
3.20 printed electronics based final products  4
3.21 printed electronics based modules and units   4
3.22 printed electronics through-hole  4
3.23 printed electronics via  4
3.24 surface finish  4

4 DESIGN PROCESS FLOW

4.1 Printed Electronics Design Process Flow Stages  5
4.1.1 Function and Purpose Definition   6
4.1.2 Performance Specifications  7
4.1.3 Materials Selections   8
4.1.4 Design and Architecture  9
4.1.5 Manufacturing Process Layout  18
4.1.6 Cost Analysis  20
4.1.7 Final Device, Module and Unit, and Product   21

5 NOTES

5.1 Data Conversion Initiative Background  23

6 REFERENCES

Figures

Figure 1-1 Hierarchy for IPC/JPCA Printed
Electronics Documents  1
Figure 1-2 Future Hierarchy for IPC/JPCA Printed Electronics Documents   1
Figure 4-1 Printed Electronics Design Process Flow   5
Figure 4-2 Base Materials Family Designation   8
Figure 4-3a Single Layer – Single-Sided Topology  9
Figure 4-3b Single Layer – Single-Sided Topology  9
Figure 4-4a Single Layer – Single-Sided with Printed Jumpers Topology   9
Figure 4-4b Single Layer – Single-Sided with Printed Jumpers Topology   10
Figure 4-5a Single Layer – Double-Sided Topology   11
Figure 4-5b Single Layer – Double-Sided Topology   11
Figure 4-6a Multiple Layer – Single-Sided Topology  12
Figure 4-6b Multiple Layer – Single-Sided Topology  12
Figure 4-7a Multiple Layer – Double-Sided Topology  14
Figure 4-7b Multiple Layer – Double-Sided Topology  14
Figure 4-8 Definitions of Printed Layer and Feature Attributes   16
Figure 4-9a Hybrid Single Layer – Single-Sided Topology  17
Figure 4-9b Hybrid Single Layer – Single-Sided Topology  17
Figure 4-10a Hybrid Multiple Layer – Single-Sided Topology  17
Figure 4-10b Hybrid Multiple Layer – Single-Sided Topology  17
Figure 4-11 Hybrid Structure – Printed Component with Nonprinted Microelectronics Topology  18
Figure 4-12 Example Printed Electronics Manufacturing Process Layout  19
Figure 4-13 Design Data Conversion Flow  21
Figure 4-14 Design Data Verification Flow   22

Tables

Table 4-1 Printed Electronics – Design for Purpose   6
Table 4-2 Performance Specifications   7
Table 4-3 Printed Electronics Materials   8
Table 4-4 Single Layer – Single-Sided Design   9
Table 4-5 Single Layer – Single-Sided with Jumper Design  10
Table 4-6 Single Layer – Double-Sided Design  11
Table 4-7 Multiple Layer – Single-Sided Design   13
Table 4-8 Multiple Layer – Double-Sided Design   15
Table 4-9 Interfaces and Interconnects   15
Table 4-10 Single Layer – Single-Sided Hybrid Structure Design  17
Table 4-11 Multiple Layer – Single-Sided Hybrid Structure Design  18
Table 4-12 Manufacturing Process Layout Parameters  18
Table 4-13 Processing Technologies and Testing Parameters  19
Table 4-14 Cost Analysis Parameters   20
Table 4-15 Design Data to Fabricate Printed Structures  22

 

 
Date of Publication:
Aug 1, 2013
File Format:
CD-ROM & Print Copy
Number of Pages:
24 Pages
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