The Graphene Report is a comprehensive analysis of the market and commercial opportunities for these remarkable materials. This new edition has greatly expanded the sections covering flexible electronics, wearables and energy and details on industry demand in tons (current and projected) has been added for key markets.
The Packaging Cost and Price Model is designed to calculate the manufacturing cost and selling price of most semiconductor packages. The model forward forecasts out to 2025. 75mm to 300mm wafer sizes are supported. Packaging cost, packaging step costs and material usage are calculated.
The IC Cost and Price Model allows users to easily estimate the cost and price of most low power silicon-based ICs such as SOCs, microprocessors, ASICs, DRAM, NAND and more. The IC Model is very easy to use, the user only has to make eight selections or entry's and there is help for many of them. The model then presents a detailed analysis of cost and pricing and offers over seventy options for customization. Cost includes wafer fabrication, wafer test, packaging and final test.
This report focuses on the entire hard disk drive market food chain, analyzing the markets for hard disk drives, substrates, and thin film heads. Processing issues in the manufacture of each of these sectors in included and the report details the CMP and Lithography sectors of thin film head processing. Market forecasts and market shares of all sectors are detailed. The SSD market is also analyzed.
The growth of the FPD market with the diffusion of digital home appliances is driving the large-format photomask market and prompting some companies to enter. In order to remain competitive in such circumstances, companies have been strengthening their technological capabilities and creating higher value-added products, as well as provide products at reasonable cost and with a delivery time that satisfies customer demands. Driving the TFT-LCD photomask market are a generation-shift to bigger glass plates and a design-rule cycle of panel technology that changes every 12 months. In this report, the worldwide markets are analyzed and projected, and market shares of vendors presented.
This report offers a complete analysis of the Process Control market, segmented as: Lithography Metrology; Wafer Inspection/Defect Review; Thin Film Metrology; and Other Process Control Systems. Each of these sectors is further segmented. Market shares of competitors for all segment is presented.
In this report we identify and forecast areas of related technologies where a small or mid-sized chemical and material companies can compete: Solar, MEMS, LEDs, HDD, and WLP. As a result, the small business even with their limited resources can better serve these market segments by offering customized offerings, because the products of the big business will often be too generic to suit the needs of a niche market audience.
Microcontrollers (MCUs) used in Smart Cities, Smart Homes, Smart Industry, Smart Health, and Smart Transport (a subset of the Internet of Things (IoT)), represented just 10% of the overall MCU market in 2014. But in 2020, $10 billion in MCUs, representing 40% of the total market, will be used in these applications.
This report analyzes the wearable industry and markets for the two wearable camps described above. Forecasts are also presented for semiconductor content and markets for MEMs devices, sensors, CPUs and low-power MPUs, GPS, and connectivity chips.
A number of technical and operational trends within the semiconductor manufacturing industry are strengthening the need for more effective advanced equipment solutions. These trends include: Development of Smaller Semiconductor Features. The development of smaller features, now as small as 20nm in production and 10nm in R&D, enables semiconductor manufacturers to produce larger numbers of circuits per wafer and to achieve higher circuit performance. Transition to 3D device structures. Foundries are adopting 3D FinFET transistors starting at 14/16 nm technology nodes to get improved performance and use less power in 1x technology nodes. Memory makers will move to 3D NAND and vertical structures for next generation NAND technology. Transition to 3D Integration Technology. Three-dimensional (3D) integration of active devices, directly connecting multiple IC chips, offers many benefits, including power efficiency, performance enhancements, significant product miniaturization, and cost reduction.
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