Semiconductor Technology and Markets

US$5,550.00
Date of Publication: Jul 24, 2015

This report provides: An overview of the global market for thermal interface materials, which have experienced growing demand with the increased need for thermal management technologies. Analyses of global market trends, with data from 2014, estimates for 2015, and projections of compound annual growth rates (CAGRs) through 2020. Identification of thermal interface materials (TIM) technologies and products with the greatest commercial potential in the near to mid-term, and of companies that are best positioned to meet this demand because of proprietary technologies, strategic alliances, or other advantages.  The global market for thermal interface materials reached $715.9 million in 2014. This market is forecasted to grow at a compound annual growth rate (CAGR) of 7.4% to reach nearly $1.1 billion in 2020.


US$2,500.00
Date of Publication: Jul 24, 2015
New technologies have mushroomed in OSAT field, but few of them were commercialized and used on a massive basis in recent years. The most popular new technologies now include FOWLP, 2.5D and TSV, which are afraid to be put into large-scale application after 2017. On the one hand, these new technologies are not sufficiently mature and small in scale, leading to higher cost, like FOWLP attempting to replace FC-CSP. On the other hand, the reason lies in business model. Wafer-level packaging (WLP) has become more and more common, but the business model in which whether Foundry or OSAT dominates WLP still needs to be explored. As business model has not been fully shaped, downstream vendors will adopt a wait-and-see attitude. For future 2.5D and 3D packaging, most of silicon interposer layers may be completed by OSAT companies and part by Foundries. There may be also companies that specialize in silicon interposer layers.

US$5,550.00
Date of Publication: Feb 26, 2014
System-in-package (SiP) is a combination of integrated circuits (ICs) enclosed in a single package or module. Additionally, passive components are mounted on the same substrate. SiP is not just an IC package with multiple dies; it comprises fully functional systems or subsystems in an IC package format. SiP, while being a packaging technique, differs substantially from other packaging technologies. The latter largely involve minimal complex design considerations, whereas for SiP, an effective subsystem or system, the interconnection and integration are substantially more complex. SiP brings tangible gains in space reduction. While system-on-chip (SoC) achieves the same objective more effectively, SoC design is more complex and time consuming than SiP. SiP’s simplicity has opened a wide array of uses for it in less than a decade since its inception. However, SiP also faces significant challenges in being able to assure form yield maximization.