High k and ALD/CVD Metal Precursors - A Semiconductor Materials Report

ALD/CVD High K and Metal Precursors For the Semiconductor IC Market

Techcet, Date of Publication: Mar 25, 2015, 76 Pages
US$4,279.00
TC5669

The High K / ALD Metal Precursors report provides information on the applications and markets associated with front end and back end of line precursors used to produce high dielectric constant (K) dielectrics and atomic layer deposition metal oxides and nitrides.


TABLE OF CONTENTS

EXECUTIVE SUMMARY

1. SCOPE

2. IC TECHNOLOGY ROADMAP AND IMPLICATIONS

2.1 Logic Transistor Evolution 11
2.2 Metallization Evolution 13
2.2.1 More than Moore Stacked Packaging 15
2.3 Memory Evolution 16
2.4 Implication of Device Evolution to IC Fabs, Processes and Materials 17
2.5 Looking Beyond 2019 21
2.5.1 Moving from 300mm to 450mm Wafers 26
2.6 Forecast of Wafer Starts by Nodes and Product Mixes by Year 29

3. HIGH K GATE DIELECTRICS

3.1 Application Description and Current Gate Materials 31
3.2 Front End of Line Organometallic Precursor Overview (Gate and Capacitors) 35
3.3 Future Gate Dielectrics and Requirements 36
3.4 Future Gate Material Candidates and Precursors 38
3.5 Hi Gate Dielectric Market and Forecast 40

4. HIGH- CAPACITORS FOR MEMORY DEVICES

4.1 High K Current Capacitor materials and precursors 43
4.2 Future Capacitor Materials and Precursors 45
4.3 High K Capacitor Market and Forecast 46

5. INTERCONNECT

5.1 Interconnect Trends 49
5.2 Metal Plugs and Interconnect Materials CVD/ALD Metals Forecast 54
5.3 Alternative Barrier, Interconnect and Capping Materials 55
5.3.1 Chemical Vapor Deposited Aluminum 57
5.3.2 Atomic Layer Deposition Development for Barrier Films 57
5.3.3 Copper Cap after CMP 58

6. PRECURSOR DELIVERY

7. ORGANOMETALLIC PRECURSORS TOTAL MARKET SUMMARY AND MARKET DYNAMICS

7.1 Supply Value Chain 62
7.2 Market Shares 64
7.2.1 Regional Supplier Ranking 64
7.3 FUSI 67
7.3.1 Advantages of FUSI 68
7.3.2 FUSI Challenges 69
7.4 High- Dielectric and Metal-Gate Technology 69
7.5 Advantages of Metal Gate (vs Polysilicon Gate) 70
7.5.1 Metal-Gate Challenges 70
7.5.2 High- Metal-Gate Process Flow Notes: 73

Appendix

Appendix A: FUSI, Gate First, Gate Last Process Technologies 66
Appendix B: Chemical Structure of the Complexes TDMAT and TDEAT 76

List of Figures

Figure 1: Comparison of Planar and 3D (TriGate/FinFET) CMOS Transistor (A) Planar,(B) FinFET on Bulk Si & (C) FinFET SOI 11
Figure 2: One Version of InGaAs on Si wafer 12
Figure 3: MPU / MCU Device Roadmap May 2014 13
Figure 4: Non-Volatile Memory Device Roadmap May 2014 16
Figure 5 22nm FinFET Metal Gate Electrode Materials (ref Chipworks ASMC 2014) 19
Figure 6: Time Line Logic Device Technology through 2020 22
Figure 7: Forecast Silicon Shipment Trends by Node and Product Type (thousands of 200mm equivalent wafers/year) 30
Figure 8: CMOS with SiO2 Gate Dielectric Structure 33
Figure 9: Device with Gate First High- Gate Dielectric Structure 33
Figure 10: High- Gate Dielectric & Metal Electrode Precursor Forecast (Logic & DRAM) 40
Figure 11: DRAM Vertical Stacked Capacitor Application 42
Figure 12: 32nm and beyond Vertical Capacitor 43
Figure 13: High- Precursors for Capacitor (Memory) 46
Figure 14: High- and ALD Applications 49
Figure 15: Revenue Forecast for CVD (or ALD) Plug Metal (Metal 0), Barrier Precursors and Seeds 55
Figure 16: CVD/ALD High- Materials Market, assumes Co as Barrier for 14nm 61
Figure 17: Hi K / ALD Precursor Supplier Market Share (% of WW Revenues) 64
Figure A1: Device with Gate-First 66
Figure A2: Device with Replacement-Metal Gate-Last 67
Figure A3: SEM of FUSI Device 67
Figure A4: FUSI Process Flow 68
Figure A5: One Possible Metal-Gate-First Process Flow 72
Figure A6: Intel Penryn's Replacement-Metal-Gate Process 74

List of Tables

Table 1: Front End of Line High k and Metal CVD/ALD Precursor Revenues Forecast 6
Table 2: Front End Dielectric Materials & Processes, 2014, 2016 & 2018 7
Table 3: Leading Edge Interconnect Materials & Processes, 2014, 2016 and 2018 8
Table 4: Emerging Memory Device Research and Associated Challenges ­ ITRS 24
Table 5: Emerging Development on Logic Devices ­ ITRS (source: International Technology Roadmap for Semiconductor, www.itrs.net) 25
Table 6: Dielectric Constant of Transistor Gate and Memory Capacitor Dielectric Material 34
Table 7: 2013 ITRS Interconnect Difficult Challenges 52
Table 8: Materials & Process Options for 2014, 2016 & 2018 53
Table 9: Organometallic Precursors: Synthesizers and Suppliers to the IC Market 63

 

Date of Publication:
Mar 25, 2015
File Format:
PDF via E-mail
Number of Pages:
76 Pages
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