Semiconductor Technology and Markets

US$2,495.00
Date of Publication: Jan 14, 2020
This technology-marketing report examines and projects the technologies involved in the planarization of semiconductor layers. The emphasis is on Chemical Mechanical Polishing (CMP). This report discusses the technology trends, products, applications, and suppliers of materials and equipment. A market forecast for CMP equipment and materials and market shares of vendors is presented.

US$2,495.00
Date of Publication: Jan 14, 2020
The primary objective of this report is to review the current issues dealing with lithography as applied to the manufacture of VLSI devices.

US$2,495.00
Date of Publication: Jan 14, 2020
This report addresses the strategic issues impacting the mask making, inspection, and repair sectors of the semiconductor industry in the U.S. and the world. The mask market is segmented by geographic region. The mask equipment markets are analyzed and projected and market shares presented.

US$2,495.00
Date of Publication: Jan 14, 2020
TSV is a vertical electrical connection that passes completely through a silicon wafer or chip to create 3D ICs or packages. The drivers for market adoption of 3D ICs are increased performance, reduced form factor and cost reduction.  This report analyzes the market for TSV ICs, equipment, and materials. A critical element in enabling 3D integration is the Through-Silicon Via (TSV); a large, metal-filled conduit passing through the silicon substrate. TSV provides the high-bandwidth interconnection between stacked chips.

US$2,495.00
Date of Publication: Jan 14, 2020
This report examines the market for flip chip ICs, and the lithography and wet etch tools used in their manufacture.

US$2,495.00
Date of Publication: Jan 14, 2020
The future needs in plasma etching will be for ever tighter control of process variability, higher selectivity and less damage. This report addresses the strategic issues impacting both the user and supplier of plasma etching equipment to the semiconductor industry. Markets for dry etching and stripping are analyzed and projected. Dry etching systems are further segmented by application. Market shares of vendors in each sector are presented.

US$5,550.00
Date of Publication: Aug 20, 2019
The global market for thin-layer deposition technologies should grow from $32.1 billion in 2017 to $60.7 billion by 2022 at a compound annual growth rate (CAGR) of 13.6% for the period of 2017-2022.

US$2,495.00
Date of Publication: Jul 5, 2019

Microcontrollers (MCUs) used in Smart Cities, Smart Homes, Smart Industry, Smart Health, and Smart Transport (a subset of the Internet of Things (IoT)), represented just 10% of the overall MCU market in 2014. But in 2020, $10 billion in MCUs, representing 40% of the total market, will be used in these applications.


US$2,495.00
Date of Publication: Jul 5, 2019

This report analyzes the wearable industry and markets for the two wearable camps described above. Forecasts are also presented for semiconductor content and markets for MEMs devices, sensors, CPUs and low-power MPUs, GPS, and connectivity chips.


US$5,500.00
Date of Publication: Aug 18, 2017
This report addresses the global market for thermal management products for microchips during the forecast period through 2022. The global market for thermal management products should reach $6.3 billion by 2022 from $4.7 billion in 2017 at a compound annual growth rate (CAGR) of 6.0%, from 2017 to 2022.

US$5,550.00
Date of Publication: Nov 23, 2016
The global market for atomic layer deposition and other ultrathin film fabrication processes was valued at $1.1 billion and $1.3 billion in 2014 and 2015, respectively. This market is expected to increase from $1.5 billion in 2016 to nearly $3.7 billion in 2021 at a compound annual growth rate (CAGR) of 19.1% for 2016-2021

US$5,550.00
Date of Publication: Jul 20, 2016
This report provides: An overview of the global markets for flip-chip technologies, a process to interconnect IC’s and other microelectronics devices (MEMS) to the external circuitry by means of a solder bumping process deposit on pads; Analyses of global market trends, with data from 2015, 2016, and projections of compound annual growth rates (CAGRs) through 2021. The global market for flip-chip technology totaled $24.9 billion in 2015. The market should total $27.2 billion and $41.4 billion in 2016 and 2021 respectively, increasing at a compound annual growth rate (CAGR) of 8.8% from 2016 to 2021.

US$5,550.00
Date of Publication: Jun 20, 2016
This report provides an overview of the global markets for semiconductor metallization, a process which produces a thin-film metal layer that will serve as the required conductor pattern for the interconnection of the various components on the chip. The global semiconductor metallization and interconnects market totaled $912.8 million and $1.0 billion in 2014 and 2015 respectively. The market should total nearly $1.8 billion by 2020, growing at a compound annual growth rate (CAGR) of 11.4% from 2015 to 2020.

US$5,550.00
Date of Publication: Sep 23, 2015
Global markets and technologies for wafer-level packaging. The report provides analyses of global market trends, with data from 2013, 2014, and projections of CAGRs through 2019. Coverage of technologies including: Flip-Chip, 3-D WLP, Conventional CSP, Wafer Level CSP, Compliant WLP, Nano WLP, and others. Information on integration techniques including Fan-out WLP, Fan-in WLP, TSV, IPD.



US$5,550.00
Date of Publication: Jul 24, 2015

This report provides: An overview of the global market for thermal interface materials, which have experienced growing demand with the increased need for thermal management technologies. Analyses of global market trends, with data from 2014, estimates for 2015, and projections of compound annual growth rates (CAGRs) through 2020. Identification of thermal interface materials (TIM) technologies and products with the greatest commercial potential in the near to mid-term, and of companies that are best positioned to meet this demand because of proprietary technologies, strategic alliances, or other advantages.  The global market for thermal interface materials reached $715.9 million in 2014. This market is forecasted to grow at a compound annual growth rate (CAGR) of 7.4% to reach nearly $1.1 billion in 2020.


US$2,500.00
Date of Publication: Jul 24, 2015
New technologies have mushroomed in OSAT field, but few of them were commercialized and used on a massive basis in recent years. The most popular new technologies now include FOWLP, 2.5D and TSV, which are afraid to be put into large-scale application after 2017. On the one hand, these new technologies are not sufficiently mature and small in scale, leading to higher cost, like FOWLP attempting to replace FC-CSP. On the other hand, the reason lies in business model. Wafer-level packaging (WLP) has become more and more common, but the business model in which whether Foundry or OSAT dominates WLP still needs to be explored. As business model has not been fully shaped, downstream vendors will adopt a wait-and-see attitude. For future 2.5D and 3D packaging, most of silicon interposer layers may be completed by OSAT companies and part by Foundries. There may be also companies that specialize in silicon interposer layers.

US$5,550.00
Date of Publication: Feb 26, 2014
System-in-package (SiP) is a combination of integrated circuits (ICs) enclosed in a single package or module. Additionally, passive components are mounted on the same substrate. SiP is not just an IC package with multiple dies; it comprises fully functional systems or subsystems in an IC package format. SiP, while being a packaging technique, differs substantially from other packaging technologies. The latter largely involve minimal complex design considerations, whereas for SiP, an effective subsystem or system, the interconnection and integration are substantially more complex. SiP brings tangible gains in space reduction. While system-on-chip (SoC) achieves the same objective more effectively, SoC design is more complex and time consuming than SiP. SiP’s simplicity has opened a wide array of uses for it in less than a decade since its inception. However, SiP also faces significant challenges in being able to assure form yield maximization.